1. Field of the Invention
The present invention relates to a nonconductor production method in which packaging is processed at a wafer level and dicing is processed at the final phase, and a semiconductor device.
Priority is claimed on Japanese Patent Application No. 2005-074902, filed Mar. 16, 2005, and Japanese Patent Application No. 2005-145610, filed May 18, 2005, the contents of which are incorporated herein by reference.
2. Description of the Related Art
In recent years, in accordance with, for example, the requirements for both an increasing number of functions and an increase in performance of devices such as mobile terminals, semiconductor devices applied to these devices are required to be small and thin, and to process faster. A semiconductor device known as a so called WL-CSP (Wafer Level Chip Size Package) is getting attention because it is appropriate for such requirements. The WL-CSP is produced in a manner such that forming of rewiring, forming of electrode terminals and resin molding (packaging) in order to protect mainly an IC (Integrated Circuit) formed on the principal surface of the wafer from heat, light, physical shocks and so on, are processed at a wafer level, and at the final phase, dicing is processed. Because of such a production process, it is possible to make the site of the semiconductor device after packaging almost as small as an IC chip and it is believed that it is possible to design in even smaller sizes.
However, conventional WL-CSPs (semiconductor devices) are divided into each semiconductor device by cutting (dicing) the wafer at the final phase, therefore, the cut surface of the side face of substrates is exposed even though a principal surface of the substrates of the semiconductor devices (diced wafer) is resin molded. There is a problem in that the exposed side face is easily damaged due to physical shocks during the production steps. Moreover moisture can infiltrate between principal surface of the substrate and a resin layer, and the rewiring and electrode terminals may be oxidized and corroded in some cases.
Due to such a problem, there are semiconductor devices which are produced in a manner such that not only the principal face of the substrates but also the side face of the substrates or the side face and back of the substrates are resin-molded. Such semiconductor devices in which external faces are resin-molded, are reinforced to avoid damage to the substrates, moreover, there is a benefit in that a repairing process of a damaged area can be omitted because, for example, the defective area generated on the substrates upon dicing due to chipping can be covered.
Generally, a processing of a semiconductor device A shown in FIG. 11 in which a side face 1a and a back face 1b of a substrate 1 are covered with resin layers 2 and 3, is shown in FIG. 12. First the wafer 1 is prepared on which multiple ICs 4 are formed on a principal face 1c, a rewiring 6 which is connected electrically to the ICs 4 via a pad electrode 5 is formed, and a metal post 7 which is made from copper and is columnar is formed on the rewiring 6.
As shown in FIG. 13, after fixing a resin plate 9 (a second resin layer 3) on which a dicing tape 8 made from an elastic material is attached, on the back face 1b of the wafer 1, a first dicing is processed from the principal face 1c of the substrate 1 in an orthogonal direction to the principal face 1c. In this first dicing, a dicing depth T1 is adapted to be halfway along a thickness direction of the dicing tape 8. A cut line 10 formed in the first dicing and the principal face 1c of the wafer 1 are sealed with a resin. This first resin is a first resin layer 2 which is molded to be as thick as embedding a metal post 7 that is formed on the principal face 1c of the wafer 1.
Moreover, as shown in FIG. 14, a surface 2a of the first resin layer 2 is polished to expose an upper face 7a of the columnar metal post 7, and a bump 11 which is a bump electrode and is an entrance for electricity and signals is attached to this exposed upper face 7a. An approximately central area in a width direction of the cut line 10 which is outlined in the first dicing and in which the first resin is filled is diced again (a second dicing) from the surface 2a of the first resin layer. In this process, the second dicing is processed in a manner such that the first in layer 2 is left to cover a side face 1a cut face) of the substrate 1 (diced wafer) which is outlined in the first dicing. A dicing depth T2 of the second dicing is approximately as deep as making a slight cut line from the surface 2a of the first resin layer 2. The semiconductor device A is diced in accordance with such process.
Finally, production of the semiconductor device A shown in FIG. 11 is completed after removing the dicing tape 8. This semiconductor device A has excellent shock resistance due to that not only the principal face 1a, but also the side face, 1a and the back side 1b are covered with the first resin layer 2 and resin plate 9 (the second resin layer 3).
However, in the above described production method, there is a problem such that spread particles due to dicing adhere to the rewiring or the metal post because the rewiring or the metal post is exposed upon the first dicing. If particles adhere to the rewiring or the metal post then there can be problems such that short circuits may occur, and the rewiring and the like are oxidized and corroded due to infiltration of moisture from a boundary between the substrate and the first resin layer because of the lower adhesiveness of the first resin layer.
On the other hand, in the above production method of the semiconductor device, the wafer is maintained by the dicing tape which is adhered upon the first dicing. This dicing tape is an elastic body, therefore, the cut line may be curved easily because the wafer slides upon dicing, and therefore, there is a problem in that the precision of size of the semiconductor device may be lowered after dicing.
There is a solution to this problem in that by attaching, for example, a metal plate instead of the dicing tape, the wafer is maintained harder and dicing is processed. However, such a method of attaching a metal plate has a problem in that production costs are increased since it requires time or extra processing steps to attach the metal plate and to detach the semiconductor device.
Moreover, in the above described production method of the semiconductor device, the resin layer which covers the side face of the substrate is the first resin layer which is molded continuously with the principal face of the substrate. In recent years, in accordance with requirements for tinner semiconductor devices, a production step of polishing the back side of the substrate in order to make the semiconductor device as thin as possible has been performed. In such a production step, for example, a discal polishing member is spun while moving it towards the back side of the substrate, therefore, at edges of the first resin layer covering the side face of the substrate a force in the direction of removal of the first resin layer may be caused. Due to such a phenomena, there are some cases in which the first resin layer covering the side face is removed because of polishing. Moreover, there is a problem such that removal occurs at the principal face in accordance with removal at the side face because the first resin layer of the side face is molded continuously with the first resin layer of the principal face. In this case, another problem is caused in which the IC or the rewiring formed on the principal face of the substrate are damaged when the resin layer of the principal face is removed.
Regarding the above described problems, the present invention aims to provide a production method of a semiconductor device and a semiconductor device which can be harder without causing electrical short or removal of a resin layer.
Moreover, in the above described production method for the semiconductor device, the first resin layer and the second resin layer that cover the side face and the back face of the substrate, are fixed at the side face and at the back face respectively, therefore, there is a problem such that peeling can easily occur because of, for example, vibration upon dicing.
The first resin layer covers both the side face and the principal face of the substrate, therefore, when the first resin layer covering the side of the side face is peeled, it causes peeling of the first resin layer on the principal surface, therefore, there is a problem in that the IC, the rewiring and the like formed on the principal surface become damaged.
Regarding the above described problems, the present invention aims to provide a production method for a semiconductor device tat does not cause peeling of the resin layer and achieves a reliably strong substrate (a diced wafer) and a semiconductor device.